Effiziente Speicherverwaltung für virtuelle Maschinen
Among the performance bottlenecks for virtual machine hosting, memory comes next to I/O as a major source of overhead to be addressed. While modern processors have shown to be quite effective and mature in memory virtualization, it is not yet guaranteed that they perform equally well for high-performance computing (HPC) workloads.
We investigate new MMU management strategies for HPC environments, which involves modification in both hypervisor software and CPU hardware. For the latter part, we currently rely on restricted hardware simulation tools such as QEMU.
Although currently the two standard approaches - shadow page table (SPT) and two-dimensional-paging (TDP) - proved quite effective and mature in memory virtualization, each of them have their weaknesses. SPT is a software-based mechanism with maximum portability and flexibility, but incurs considerable performance loss due to the need of frequent vmexit to fix the shadow page table. A hardware-based mechanism - TDP is free from this kind of obsession, but introduces new overhead due to the need of walking through the multi-level page table in the second dimension. Even the TLB mitigate the overhead to a certain extent, TDP may still upset the workloads when TLB could not be fully utilized due to the abnormal behaviors in memory accessing.
For these reasons, we propose two solutions: First, a dynamic switching between SPT and TDP, and second, a simplified TDP with enlarged paging structures. With the first solution we expect to combine the best qualities of the two mechanism by switching dynamically between them as a response to the ever-changing behavior of the workload. With the second we try to avoid the negative sides by modifiying the operation of the TDP in the current hypervisor. As nowadays, the performance for virtualization does not only depends on software, but also touches deeply into hardware, both of these solutions involve modification on either hardware configuration or the implementation of hardware itself. While the software is fully under control of the hypervisor researchers, hardware is not. This gap may be filled by applying a full system emulator to provide the modified hypervisor software a non-existing execution environment before the true hardware becomes available.